1β,2α,7β-Trimethyl-8-oxo-cis-decalin-4aβ-carbonsaeure | 100964-34-9

• 分子结构分类: 有机化合物 - 有机酸及其衍生物 - 羧酸及其衍生物
• 英文名称: 1β,2α,7β-Trimethyl-8-oxo-cis-decalin-4aβ-carbonsaeure
• 英文别名: (4aS)-1c,2t,7c-trimethyl-8-oxo-(8ac)-octahydro-naphthalene-4ar-carboxylic acid；(4aS)-1c,2t,7c-Trimethyl-8-oxo-(8ac)-octahydro-naphthalin-4ar-carbonsaeure
• CAS: 100964-34-9
• 化学式: C₁₄H₂₂O₃
• 分子量: 238.327
• InChiKey: RLWYVIKUQXBJBC-WCCFOQQASA-N

反应信息

• 作为反应物：
  描述：

  重氮甲烷 、 1β,2α,7β-Trimethyl-8-oxo-cis-decalin-4aβ-carbonsaeure 生成 1β,2α,7β-Trimethyl-8-oxo-cis-decalin-4aβ-carbonsaeure-methylester
  参考文献：
  名称：

  A loop-based apparatus for at-speed self-testing

  摘要：

  At-speed testing using external tester requires an expensive equip ment, thus built-in self-test (BIST) is an alternative technique due to its ability to perform on-chip at-speed self-testing. The main issue in BIST for at-speed testing is to obtain high delay fault coverage with a low hardware overhead. This paper presents an improved loop-based BIST scheme, in which a configurable MISR (multiple-input signature register) is used to generate test-pair sequences. The structure and operation modes of the BIST scheme are described. The topological properties of the state-transition-graph of the proposed BIST scheme are analyzed. Based on it, an approach to design and efficiently implement the proposed BIST scheme is developed. Experimental results on academic benchmark circuits are presented to demonstrate the effectiveness of the proposed BIST scheme as well as the design approach.

  DOI：

  10.1007/bf02943206
• 作为产物：
  描述：

  1β,2α,7α-Trimethyl-8-oxo-cis-decalin-4aβ-carbonsaeure-methylester 在 氢氧化钾 作用下， 生成 1β,2α,7β-Trimethyl-8-oxo-cis-decalin-4aβ-carbonsaeure
  参考文献：
  名称：

  A loop-based apparatus for at-speed self-testing

  摘要：

  At-speed testing using external tester requires an expensive equip ment, thus built-in self-test (BIST) is an alternative technique due to its ability to perform on-chip at-speed self-testing. The main issue in BIST for at-speed testing is to obtain high delay fault coverage with a low hardware overhead. This paper presents an improved loop-based BIST scheme, in which a configurable MISR (multiple-input signature register) is used to generate test-pair sequences. The structure and operation modes of the BIST scheme are described. The topological properties of the state-transition-graph of the proposed BIST scheme are analyzed. Based on it, an approach to design and efficiently implement the proposed BIST scheme is developed. Experimental results on academic benchmark circuits are presented to demonstrate the effectiveness of the proposed BIST scheme as well as the design approach.

  DOI：

  10.1007/bf02943206

文献信息

• Autrey et al., Proceedings of the Chemical Society, London, 1959, p. 55
  作者：Autrey et al.

  DOI：——

  日期：——